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DSD
2004
IEEE
136views Hardware» more  DSD 2004»
13 years 11 months ago
FPGA Based Design of the Railway's Interlocking Equipments
This paper describes the architecture of a safety system of the railway's interlocking equipment, which has been developed for Czech railways. The system will be used for the...
Radek Dobias, Hana Kubatova
PPDP
2009
Springer
14 years 2 months ago
Future contracts
Many recent research projects focus on language support for behavioral software contracts, that is, assertions that govern the boundaries between software building blocks such as ...
Christos Dimoulas, Riccardo Pucella, Matthias Fell...
ICDCSW
2002
IEEE
14 years 22 days ago
Behavior and Performance of Message-Oriented Middleware Systems
The middleware technology used as the foundation of Internet-enabled enterprise systems is becoming increasingly complex. In addition, the various technologies offer a number of s...
Phong Tran, Paul Greenfield, Ian Gorton
ET
2002
115views more  ET 2002»
13 years 7 months ago
CAS-BUS: A Test Access Mechanism and a Toolbox Environment for Core-Based System Chip Testing
As System on a Chip (SoC) testing faces new challenges, some new test architectures must be developed. This paper describes a Test Access Mechanism (TAM) named CASBUS that solves ...
Mounir Benabdenbi, Walid Maroufi, Meryem Marzouki
RECONFIG
2008
IEEE
268views VLSI» more  RECONFIG 2008»
14 years 2 months ago
Parametric, Secure and Compact Implementation of RSA on FPGA
1 We present a fast, efficient, and parameterized modular multiplier and a secure exponentiation circuit especially intended for FPGAs on the low end of the price range. The desig...
Ersin Oksuzoglu, Erkay Savas