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ISCA
1997
IEEE
120views Hardware» more  ISCA 1997»
14 years 1 months ago
Run-Time Adaptive Cache Hierarchy Management via Reference Analysis
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...
Teresa L. Johnson, Wen-mei W. Hwu
CONSTRAINTS
1998
62views more  CONSTRAINTS 1998»
13 years 8 months ago
Learning Game-Specific Spatially-Oriented Heuristics
This paper describes an architecture that begins with enough general knowledge to play any board game as a novice, and then shifts its decision-making emphasis to learned, game-sp...
Susan L. Epstein, Jack Gelfand, Esther Lock
CF
2006
ACM
14 years 23 days ago
Landing openMP on cyclops-64: an efficient mapping of openMP to a many-core system-on-a-chip
This paper presents our experience mapping OpenMP parallel programming model to the IBM Cyclops-64 (C64) architecture. The C64 employs a many-core-on-a-chip design that integrates...
Juan del Cuvillo, Weirong Zhu, Guang R. Gao
SIGCSE
2009
ACM
189views Education» more  SIGCSE 2009»
14 years 9 months ago
QuickDraw: bringing graphics into first year
This paper describes a new tool for introducing computer graphics and multimedia applications into first year, called QuickDraw, and our experience using it. QuickDraw provides an...
Ben Stephenson, Craig Taube-Schock
IWPC
2005
IEEE
14 years 2 months ago
Concise and Consistent Naming
Approximately 70% of the source code of a software system consists of identifiers. Hence, the names chosen as identifiers are of paramount importance for the readability of comp...
Florian Deißenböck, Markus Pizka