294 search results - page 43 / 59 » Architectural Exploration and Optimization of Local Memory i... |
149
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ICCS
2009
Springer
15 years 10 months ago
2009
Springer
The development of optimized codes is time-consuming and requires extensive architecture, compiler, and language expertise, therefore, computational scientists are often forced to ...
147
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CODES
2008
IEEE
15 years 10 months ago
2008
IEEE
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
133
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IEEEPACT
2006
IEEE
15 years 10 months ago
2006
IEEE
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
161
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SSDBM
2010
IEEE
15 years 9 months ago
2010
IEEE
Science is becoming data-intensive, requiring new software architectures that can exploit resources at all scales: local GPUs for interactive visualization, server-side multi-core ...
175
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IWOMP
2007
Springer
15 years 10 months ago
2007
Springer
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...