268 search results - page 30 / 54 » Architectural descriptions for FPGA circuits |
FCCM
1998
IEEE
14 years 1 months ago
1998
IEEE
JHDL is a design tool for reconfigurable systems that allows designers to express circuit organizations that dynamically change over time in a natural way, using only standard pro...
DAC
2005
ACM
13 years 10 months ago
2005
ACM
We propose a normalization technique for verifying arithmetic circuits in a bounded model checking environment. Our technique operates on the arithmetic bit level (ABL) descriptio...
FPL
2004
Springer
14 years 2 months ago
2004
Springer
Abstract. This paper introduces JHDLBits, the integration of two prominent FPGA design tools: JHDL and JBits. JHDLBits offers the low-level access and control provided by JBits wi...
MTV
2005
IEEE
14 years 2 months ago
2005
IEEE
Abstract— Owing to the recent trend of using applicationspecific instruction-set processors (ASIP), many Architecture Description Languages (ADLs) have been created. They specif...
FPGA
2005
ACM
14 years 2 months ago
2005
ACM
Sublithographic Programmable Logic Arrays can be interconnected and restored using nanoscale wires. Building on a hybrid of bottom-up assembly techniques supported by conventional...