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» Architectural descriptions for FPGA circuits
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ARC
2012
Springer
256views Hardware» more  ARC 2012»
12 years 4 months ago
Table-Based Division by Small Integer Constants
Computing cores to be implemented on FPGAs may involve divisions by small integer constants in fixed or floating point. This article presents a family of architectures addressing...
Florent de Dinechin, Laurent-Stéphane Didie...
FPGA
2006
ACM
90views FPGA» more  FPGA 2006»
14 years 11 days ago
Improving performance and robustness of domain-specific CPLDs
Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run-time reconfigurabil...
Mark Holland, Scott Hauck
ICCAD
2001
IEEE
91views Hardware» more  ICCAD 2001»
14 years 5 months ago
A System for Synthesizing Optimized FPGA Hardware from MATLAB
Efficient high level design tools that can map behavioral descriptions to FPGA architectures are one of the key requirements to fully leverage FPGA for high throughput computatio...
Malay Haldar, Anshuman Nayak, Alok N. Choudhary, P...
EUC
2005
Springer
14 years 2 months ago
Evaluation of Space Allocation Circuits
This paper describes the design and evaluation of the PCA (Plastic Cell Architecture) cell, which implements a novel space allocation method. PCA is a dynamically reconfigurable a...
Shinya Kyusaka, Hayato Higuchi, Taichi Nagamoto, Y...
FPGA
2004
ACM
126views FPGA» more  FPGA 2004»
14 years 2 months ago
A synthesis oriented omniscient manual editor
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
Tomasz S. Czajkowski, Jonathan Rose