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118
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EVOW
2008
Springer
15 years 5 months ago
Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures
Abstract. In this paper we propose three small instances of a reconfigurable circuit and analyze their properties using the brute force method and evolutionary algorithm. Although ...
Lukás Sekanina, Petr Mikusek
123
Voted
USITS
2001
15 years 5 months ago
An Architecture for Content Routing Support in the Internet
The primary use of the Internet is content distribution -- the delivery of web pages, audio, and video to client applications -- yet the Internet was never architected for scalabl...
Mark Gritter, David R. Cheriton
103
Voted
TVLSI
2008
90views more  TVLSI 2008»
15 years 3 months ago
A Special-Purpose Architecture for Solving the Breakpoint Median Problem
Abstract--In this paper, we describe the design for a co-processor for whole-genome phylogenetic reconstruction. Our current design performs a parallelized breakpoint median comput...
Jason D. Bakos, Panormitis E. Elenis
114
Voted
ACMSE
2006
ACM
15 years 9 months ago
HELLAS: a specialized architecture for interactive deformable object modeling
Applications involving interactive modeling of deformable objects require highly iterative, floating-point intensive numerical simulations. As the complexity of these models incr...
Shrirang M. Yardi, Benjamin Bishop, Thomas P. Kell...
143
Voted
GLVLSI
2007
IEEE
166views VLSI» more  GLVLSI 2007»
15 years 7 months ago
Efficient pipelining for modular multiplication architectures in prime fields
This paper presents a pipelined architecture of a modular Montgomery multiplier, which is suitable to be used in public key coprocessors. Starting from a baseline implementation o...
Nele Mentens, Kazuo Sakiyama, Bart Preneel, Ingrid...