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DFT
1999
IEEE
125views VLSI» more  DFT 1999»
15 years 8 months ago
Algorithms for Efficient Runtime Fault Recovery on Diverse FPGA Architectures
The inherent redundancy and in-the-field reconfiguration capabilities of field programmable gate arrays (FPGAs) provide alternatives to integrated circuit redundancy-based fault r...
John Lach, William H. Mangione-Smith, Miodrag Potk...
ACSAC
1998
IEEE
15 years 8 months ago
An Architecture for Intrusion Detection Using Autonomous Agents
The Intrusion Detection System architectures commonly used in commercial and research systems have a number of problems that limit their configurability, scalability or efficiency...
J. S. Balasubramaniyan, J. O. Garcia-Fernandez, D....
RECOSOC
2007
160views Hardware» more  RECOSOC 2007»
15 years 5 months ago
Stack processor architecture and development methods suitable for dependable applications
Nowadays, reconfigurable and multiprocessor systems are becoming increasingly attractive for many applications. Such systems should be more and more dependable especially if error...
Mehdi Jallouli, Camille Diou, Fabrice Monteiro
ISCAS
2008
IEEE
109views Hardware» more  ISCAS 2008»
15 years 10 months ago
A low-area interconnect architecture for chip multiprocessors
— A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost and flexible routing capability. To achieve a low area cost, th...
Zhiyi Yu, Bevan M. Baas
CARDIS
2004
Springer
216views Hardware» more  CARDIS 2004»
15 years 9 months ago
Differential Fault Analysis Attack Resistant Architectures for the Advanced Encryption Standard
: We present two architectures for protecting a hardware implementation of AES against side-channel attacks known as Differential Fault Analysis attacks. The first architecture, wh...
Mark G. Karpovsky, Konrad J. Kulikowski, Alexander...