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ITCC
2005
IEEE
14 years 3 months ago
A Parallelized Design for an Elliptic Curve Cryptosystem Coprocessor
In many applications a software implementation of ECC (Elliptic Curve Cryptography) might be inappropriate due to performance requirements, therefore hardware implementations are ...
Fabio Sozzani, Guido Bertoni, Stefano Turcato, Luc...
MSS
2000
IEEE
79views Hardware» more  MSS 2000»
14 years 2 months ago
A Scalable Architecture for Maximizing Concurrency
This paper describes a design that addresses limitations inherent in the initial implementation of the Archive for the Earth Observing Systems (EOS). The design consists of two el...
Jonathan Crawford
DAC
2005
ACM
13 years 11 months ago
Modular domain-specific implementation and exploration framework for embedded software platforms
This paper focuses on designing network processing software for embedded processors. Our design flow CRACC represents an efficient path to implementation based on a modular applic...
Christian Sauer, Matthias Gries, Sören Sonnta...
ICASSP
2011
IEEE
13 years 1 months ago
High-throughput implementation of tree-search algorithms for vector precoding
This contribution analyzes the architecture design and FPGA implementation of high-throughput multiuser vector precoders. The most complex task of such precoders, i.e. the search ...
Maitane Barrenechea, Luis G. Barbero, Idoia Jimene...
TVLSI
2008
133views more  TVLSI 2008»
13 years 9 months ago
A Medium-Grain Reconfigurable Architecture for DSP: VLSI Design, Benchmark Mapping, and Performance
Reconfigurable hardware has become a well-accepted option for implementing digital signal processing (DSP). Traditional devices such as field-programmable gate arrays offer good fi...
Mitchell J. Myjak, José G. Delgado-Frias