698 search results - page 72 / 140 » Architecture Evaluation for Distributed Auto-ID Systems |
NOCS
2007
IEEE
14 years 3 months ago
2007
IEEE
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
CODASPY
2012
12 years 4 months ago
2012
Main stream operating system kernels lack a strong and reliable mechanism for identifying the running processes and binding them to the corresponding executable applications. In t...
CONCUR
1998
Springer
14 years 1 months ago
1998
Springer
Performance evaluation is a central issue in the design of complex real-time systems. In this work, we propose an extension of socalled "Max-Plus" algebraic techniques to...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...
ICPP
2006
IEEE
14 years 2 months ago
2006
IEEE
— This paper focuses on the transfer of large data in SMP systems. Achieving good performance for intranode communication is critical for developing an efficient communication s...