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» Architecture for a Non-deterministic Simulation Machine
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HPCA
2009
IEEE
14 years 8 months ago
Voltage emergency prediction: Using signatures to reduce operating margins
Inductive noise forces microprocessor designers to sacrifice performance in order to ensure correct and reliable operation of their designs. The possibility of wide fluctuations i...
Vijay Janapa Reddi, Meeta Sharma Gupta, Glenn H. H...
GECCO
2007
Springer
159views Optimization» more  GECCO 2007»
14 years 2 months ago
A systemic computation platform for the modelling and analysis of processes with natural characteristics
Computation in biology and in conventional computer architectures seem to share some features, yet many of their important characteristics are very different. To address this, [1]...
Erwan Le Martelot, Peter J. Bentley, R. Beau Lotto
PODC
2004
ACM
14 years 1 months ago
Computation in networks of passively mobile finite-state sensors
We explore the computational power of networks of small resource-limited mobile agents. We define two new models of computation based on pairwise interactions of finite-state ag...
Dana Angluin, James Aspnes, Zoë Diamadi, Mich...
GLVLSI
1998
IEEE
122views VLSI» more  GLVLSI 1998»
14 years 6 days ago
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...
PODC
1994
ACM
14 years 21 hour ago
A Performance Evaluation of Lock-Free Synchronization Protocols
In this paper, we investigate the practical performance of lock-free techniques that provide synchronization on shared-memory multiprocessors. Our goal is to provide a technique t...
Anthony LaMarca