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» Architectures for Controller Based CDP
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ISCAS
2005
IEEE
156views Hardware» more  ISCAS 2005»
14 years 1 months ago
Optimal 2 sub-bank memory architecture for bit plane coder of JPEG2000
—JPEG2000 image compression standard is designed to cater the needs of a large span of applications including numerous consumer products. However, its use is still restricted due...
Amit Kumar Gupta, Saeid Nooshabadi, David S. Taubm...
ISCAS
2007
IEEE
122views Hardware» more  ISCAS 2007»
14 years 2 months ago
Multi-Channel Coherent Detection for Delay-Insensitive Model-Free Adaptive Control
— A mixed-signal architecture for continuous-time multidimensional model-free optimization is presented. It is based on multi-channel coherent modulation and detection that relia...
Dimitrios N. Loizos, Paul-Peter Sotiriadis, Gert C...
ISCC
2002
IEEE
141views Communications» more  ISCC 2002»
14 years 19 days ago
Adaptive resource-based Web server admission control
Web servers must be protected from overload since server overload leads to low server throughput and increased response times experienced by the clients. Server overload occurs wh...
Thiemo Voigt, Per Gunningberg
ASWEC
2007
IEEE
13 years 11 months ago
Explicitly Controlling the Fair Service for Busy Web Servers
There is a growing demand for web applications to provide fair service to the highly concurrent requests. In this paper, we present an approach to addressing this requirement. Bas...
Zhanwen Li, David Levy, Shiping Chen, John Zic
IEEECIT
2010
IEEE
13 years 6 months ago
CFCSS without Aliasing for SPARC Architecture
With the increasing popularity of COTS (commercial off the shelf) components and multi-core processor in space and aviation applications, software fault tolerance becomes attracti...
Chao Wang, Zhongchuan Fu, Hongsong Chen, Wei Ba, B...