Sciweavers

643 search results - page 102 / 129
» Architectures for function evaluation on FPGAs
Sort
View
SIGMETRICS
2000
ACM
177views Hardware» more  SIGMETRICS 2000»
14 years 3 days ago
A case for end system multicast
— The conventional wisdom has been that IP is the natural protocol layer for implementing multicast related functionality. However, more than a decade after its initial proposal,...
Yang-Hua Chu, Sanjay G. Rao, Hui Zhang
ACSAC
2003
IEEE
13 years 11 months ago
Defending Embedded Systems Against Buffer Overflow via Hardware/Software
Buffer overflow attacks have been causing serious security problems for decades. With more embedded systems networked, it becomes an important research problem to defend embedded ...
Zili Shao, Qingfeng Zhuge, Yi He, Edwin Hsing-Mean...
SIGCOMM
2010
ACM
13 years 8 months ago
SwitchBlade: a platform for rapid deployment of network protocols on programmable hardware
We present SwitchBlade, a platform for rapidly deploying custom protocols on programmable hardware. SwitchBlade uses a pipeline-based design that allows individual hardware module...
Muhammad Bilal Anwer, Murtaza Motiwala, Muhammad M...
EUROSYS
2007
ACM
14 years 4 months ago
Macroprogramming heterogeneous sensor networks using cosmos
In this paper, we present COSMOS, a novel architecture for macroprogramming heterogeneous sensor network systems. Macroprogramming entails aggregate system behavior specification...
Asad Awan, Suresh Jagannathan, Ananth Grama
CF
2010
ACM
14 years 25 days ago
On-chip communication and synchronization mechanisms with cache-integrated network interfaces
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
Stamatis G. Kavadias, Manolis Katevenis, Michail Z...