72 search results - page 3 / 15 » Assigning Blame: Mapping Performance to High Level Parallel ... |
IPPS
2009
IEEE
14 years 2 months ago
2009
IEEE
In this paper we discuss our initial experiences adapting OpenMP to enable it to serve as a programming model for high performance embedded systems. A high-level programming model...
IPPS
2005
IEEE
14 years 29 days ago
2005
IEEE
Computational biology research is now faced with the burgeoning number of genome data. The rigorous postprocessing of this data requires an increased role for high performance com...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
With the advent of the multicore era, parallel programming is becoming ubiquitous. Multithreading is a common approach to benefit from these architectures. Hybrid M:N libraries lik...
CAMP
2005
IEEE
14 years 1 months ago
2005
IEEE
Abstract— An image sensor in which each pixel has a processing element is called a vision chip. The vision chip can perform real-time visual processing at a high frame rate of 10...
FCCM
2011
IEEE
12 years 11 months ago
2011
IEEE
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...