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» Assumption Generation for Software Component Verification
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FMICS
2008
Springer
13 years 9 months ago
Formal Verification of the Implementability of Timing Requirements
There has been relatively little work on the implementability of timing requirements. We have previously provided definitions of fundamental timing operators that explicitly consid...
Xiayong Hu, Mark Lawford, Alan Wassyng
ASPDAC
2006
ACM
133views Hardware» more  ASPDAC 2006»
14 years 1 months ago
An SPU reference model for simulation, random test generation and verification
– An instruction set level reference model was developed for the development of synergistic processing unit (SPU) , which is one of the key components of the cell processor [1][2...
Yukio Watanabe, Balazs Sallay, Brad W. Michael, Da...
ARCS
2004
Springer
13 years 11 months ago
A Note on Certificate Path Verification in Next Generation Mobile Communications
Abstract. Certificate-based authentication of parties provides a powerful means for verifying claimed identities, since communicating partners do not have to exchange secrets in ad...
Matthias Enzmann, Elli Giessler, Michael Haisch, B...
EMSOFT
2006
Springer
13 years 11 months ago
Software partitioning for effective automated unit testing
A key problem for effective unit testing is the difficulty of partitioning large software systems into appropriate units that can be tested in isolation. We present an approach th...
Arindam Chakrabarti, Patrice Godefroid
FDL
2004
IEEE
13 years 11 months ago
A Formal Verification Approach for IP-based Designs
This paper proposes a formal verification methodology which is smoothly integrated with component-based system-level design, using a divide and conquer approach. The methodology a...
Daniel Karlsson, Petru Eles, Zebo Peng