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» Automated Environment Generation for Software Model Checking
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FMCAD
2006
Springer
14 years 25 days ago
Design for Verification of the PCI-X Bus
The importance of re-usable Intellectual Properties (IPs) cores is increasing due to the growing complexity of today's system-on-chip and the need for rapid prototyping. In th...
Haja Moinudeen, Ali Habibi, Sofiène Tahar
SENSYS
2010
ACM
13 years 7 months ago
Evolution and sustainability of a wildlife monitoring sensor network
As sensor network technologies become more mature, they are increasingly being applied to a wide variety of applications, ranging from agricultural sensing to cattle, oceanic and ...
Vladimir Dyo, Stephen A. Ellwood, David W. Macdona...
DAC
2005
ACM
14 years 10 months ago
Word level predicate abstraction and refinement for verifying RTL verilog
el Predicate Abstraction and Refinement for Verifying RTL Verilog Himanshu Jain CMU SCS, Pittsburgh, PA 15213 Daniel Kroening ETH Z?urich, Switzerland Natasha Sharygina CMU SCS an...
Himanshu Jain, Daniel Kroening, Natasha Sharygina,...
WSC
2000
13 years 10 months ago
Use of discrete event simulation to validate an agent based scheduling engine
This paper discusses the use of simulation in a new context. Most often QUEST is viewed as a stand-alone simulation tool to analyze and understand shop floor behavior. It has rare...
Shubhabrata Biswas, Sara Merchawi
SP
2010
IEEE
194views Security Privacy» more  SP 2010»
14 years 1 months ago
Identifying Dormant Functionality in Malware Programs
—To handle the growing flood of malware, security vendors and analysts rely on tools that automatically identify and analyze malicious code. Current systems for automated malwar...
Paolo Milani Comparetti, Guido Salvaneschi, Engin ...