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» Automated Logical Verification Based on Trace Abstractions
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KBSE
2005
IEEE
14 years 1 months ago
Automated test generation for engineering applications
In test generation based on model-checking, white-box test criteria are represented as trap conditions written in a temporal logic. A model checker is used to refute trap conditio...
Songtao Xia, Ben Di Vito, César Muño...
CADE
2008
Springer
14 years 8 months ago
Individual Reuse in Description Logic Reasoning
Abstract. Tableau calculi are the state-of-the-art for reasoning in description logics (DL). Despite recent improvements, tableau-based reasoners still cannot process certain knowl...
Boris Motik, Ian Horrocks
ICLP
2007
Springer
14 years 1 months ago
Automatic Binding-Related Error Diagnosis in Logic Programs
Abstract. This paper proposes a diagnosis algorithm for locating a certain kind of errors in logic programs: variable binding errors that result act symptoms during compile-time ch...
Pawel Pietrzak, Manuel V. Hermenegildo
ICCBR
2009
Springer
13 years 5 months ago
On Similarity Measures Based on a Refinement Lattice
Abstract. Retrieval of structured cases using similarity has been studied in CBR but there has been less activity on defining similarity on description logics (DL). In this paper w...
Santiago Ontañón, Enric Plaza
APN
2008
Springer
13 years 9 months ago
MC-SOG: An LTL Model Checker Based on Symbolic Observation Graphs
Model checking is a powerful and widespread technique for the verification of finite distributed systems. However, the main hindrance for wider application of this technique is the...
Kais Klai, Denis Poitrenaud