Sciweavers

307 search results - page 51 / 62
» Automated Performance Measurement of Parallel Programs
Sort
View
FPGA
2004
ACM
119views FPGA» more  FPGA 2004»
14 years 2 months ago
A quantitative analysis of the speedup factors of FPGAs over processors
The speedup over a microprocessor that can be achieved by implementing some programs on an FPGA has been extensively reported. This paper presents an analysis, both quantitative a...
Zhi Guo, Walid A. Najjar, Frank Vahid, Kees A. Vis...
IPPS
2005
IEEE
14 years 2 months ago
Fast Address Translation Techniques for Distributed Shared Memory Compilers
The Distributed Shared Memory (DSM) model is designed to leverage the ease of programming of the shared memory paradigm, while enabling the highperformance by expressing locality ...
François Cantonnet, Tarek A. El-Ghazawi, Pa...
DCOSS
2006
Springer
14 years 8 days ago
Optimal Placement and Selection of Camera Network Nodes for Target Localization
The paper studies the optimal placement of multiple cameras and the selection of the best subset of cameras for single target localization in the framework of sensor networks. The ...
Ali Ozer Ercan, Danny B. Yang, Abbas El Gamal, Leo...
HPDC
2010
IEEE
13 years 9 months ago
Improving the Hadoop map/reduce framework to support concurrent appends through the BlobSeer BLOB management system
Hadoop is a reference software framework supporting the Map/Reduce programming model. It relies on the Hadoop Distributed File System (HDFS) as its primary storage system. Althoug...
Diana Moise, Gabriel Antoniu, Luc Bougé
ASAP
2005
IEEE
133views Hardware» more  ASAP 2005»
14 years 2 months ago
Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware
In this paper, we propose a hardware/software partitioning method for improving applications’ performance in embedded systems. Critical software parts are accelerated on hardwar...
Michalis D. Galanis, Grigoris Dimitroulakos, Costa...