4359 search results - page 35 / 872 » Automated Pipeline Design |
MIDDLEWARE
2004
Springer
14 years 1 months ago
2004
Springer
Collaborating users need to move terabytes of data among their sites, often involving multiple protocols. This process is very fragile and involves considerable human involvement ...
GLVLSI
2006
IEEE
14 years 2 months ago
2006
IEEE
Functional verification is one of the major bottlenecks in microprocessor design. Simulation-based techniques are the most widely used form of processor verification. Efficient ...
MEMOCODE
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper presents results on processor specification from a specialized high-level finite state machine (FSM) language. The language is an extension and enhancement of earlier...
CODES
2006
IEEE
14 years 2 months ago
2006
IEEE
In this paper, we present a methodology for designing a pipeline of accelerators for an application. The application is modeled using sequential C language with simple stylization...
DAC
2012
ACM
11 years 10 months ago
2012
ACM
Loop pipelining is a critical transformation in behavioral synthesis. It is crucial to producing hardware designs with acceptable latency and throughput. However, it is a complex ...