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DAC
2005
ACM
14 years 8 months ago
StressTest: an automatic approach to test generation via activity monitors
The challenge of verifying a modern microprocessor design is an overwhelming one: Increasingly complex micro-architectures combined with heavy time-to-market pressure have forced ...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
POPL
2010
ACM
14 years 5 months ago
Dependent Types from Counterexamples
d by recent research in abstract model checking, we present a new approach to inferring dependent types. Unlike many of the existing approaches, our approach does not rely on prog...
Tachio Terauchi
UTP
2010
13 years 6 months ago
Unifying Theories in Isabelle/HOL
In this paper, we present various extensions of Isabelle/HOL by theories that are essential for several formal methods. First, we explain how we have developed an Isabelle/HOL theo...
Abderrahmane Feliachi, Marie-Claude Gaudel, Burkha...
DAC
2012
ACM
11 years 10 months ago
Equivalence checking for behaviorally synthesized pipelines
Loop pipelining is a critical transformation in behavioral synthesis. It is crucial to producing hardware designs with acceptable latency and throughput. However, it is a complex ...
Kecheng Hao, Sandip Ray, Fei Xie
TAPSOFT
1997
Springer
13 years 11 months ago
The Railroad Crossing Problem: Towards Semantics of Timed Algorithms and Their Model Checking in High Level Languages
The goal of this paper is to analyse semantics of algorithms with explicit continuous time with further aim to nd approaches to automatize model checking in high level, easily unde...
Danièle Beauquier, Anatol Slissenko