Sciweavers

1151 search results - page 209 / 231
» Automatic Generation of Complex Properties for Hardware Desi...
Sort
View
ATVA
2007
Springer
136views Hardware» more  ATVA 2007»
14 years 1 months ago
Symbolic Fault Tree Analysis for Reactive Systems
Fault tree analysis is a traditional and well-established technique for analyzing system design and robustness. Its purpose is to identify sets of basic events, called cut sets, wh...
Marco Bozzano, Alessandro Cimatti, Francesco Tappa...
RT
2004
Springer
14 years 28 days ago
Anti-aliasing and Continuity with Trapezoidal Shadow Maps
This paper proposes a new shadow map technique termed trapezoidal shadow maps to calculate high quality shadows in real-time applications. To address the resolution problem of the...
Tobias Martin, Tiow Seng Tan
CHARME
2003
Springer
196views Hardware» more  CHARME 2003»
14 years 25 days ago
Analyzing the Intel Itanium Memory Ordering Rules Using Logic Programming and SAT
We present a non-operational approach to specifying and analyzing shared memory consistency models. The method uses higher order logic to capture a complete set of ordering constra...
Yue Yang, Ganesh Gopalakrishnan, Gary Lindstrom, K...
CA
1999
IEEE
13 years 12 months ago
Fast Synthetic Vision, Memory, and Learning Models for Virtual Humans
This paper presents a simple and efficient method of modeling synthetic vision, memory, and learning for autonomous animated characters in real-time virtual environments. The mode...
James J. Kuffner Jr., Jean-Claude Latombe
DELTA
2004
IEEE
13 years 11 months ago
Scan Test of IP Cores in an ATE Environment
Manufacturing test of chips made of multiple IP cores requires different techniques if ATE is used. As scan chains are commonly used as access paths to the DUT, ATE architectures ...
Luca Schiano, Yong-Bin Kim, Fabrizio Lombardi