333 search results - page 43 / 67 » Automatic Generation of Parallel Treebanks |
PPOPP
2010
ACM
14 years 4 months ago
2010
ACM
We present a static analysis for the automatic generation of symbolic prefetches in a transactional distributed shared memory. A symbolic prefetch specifies the first object to be...
NCA
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper deals with general nested loops and proposes a novel scheduling methodology for reducing the communication cost of parallel programs. General loops contain complex loop...
PARELEC
2002
IEEE
14 years 17 days ago
2002
IEEE
Many practical applications generate irregular, nonbalanced divide-and-conquer trees which have different depths, possibly also different numbers of successors at different levels...
FCCM
2011
IEEE
12 years 11 months ago
2011
IEEE
— This paper describes an architecture and FPGA synthesis toolchain for building specialized, energy-saving coprocessors called Irregular Code Energy Reducers (ICERs) for a wide ...
ECBS
1996
IEEE
13 years 11 months ago
1996
IEEE
In this paper, it is shown that, through the use of Model-Integrated Program Synthesis MIPS, parallel real-time implementations of image processing data ows can be synthesized fro...