Sciweavers

179 search results - page 25 / 36
» Automatic High Level Assertion Generation and Synthesis for ...
Sort
View
RTCSA
2007
IEEE
14 years 1 months ago
An MPSoC Performance Estimation Framework Using Transaction Level Modeling
— To use the tremendous hardware resources available in next generation MultiProcessor Systems-on-Chip (MPSoC) efficiently, rapid and accurate design space exploration (DSE) met...
Rabie Ben Atitallah, Smaïl Niar, Samy Meftali...
SCOPES
2005
Springer
14 years 29 days ago
Software Synthesis from the Dataflow Interchange Format
Specification, validation, and synthesis are important aspects of embedded systems design. The use of dataflow-based design environments for these purposes is becoming increasingl...
Chia-Jui Hsu, Shuvra S. Bhattacharyya
ECBS
2005
IEEE
179views Hardware» more  ECBS 2005»
14 years 1 months ago
Prototype of Fault Adaptive Embedded Software for Large-Scale Real-Time Systems
This paper describes a comprehensive prototype of large-scale fault adaptive embedded software developed for the proposed Fermilab BTeV high energy physics experiment. Lightweight...
Derek Messie, Mina Jung, Jae C. Oh, Shweta Shetty,...
ET
1998
99views more  ET 1998»
13 years 7 months ago
A Behavior Model for Next Generation Test Systems
Defining information required by automatic test systems frequently involves a description of system behavior. To facilitate capturing the required behavior information in the cont...
Lee A. Shombert, John W. Sheppard
SBCCI
2006
ACM
200views VLSI» more  SBCCI 2006»
14 years 1 months ago
REDEFIS: a system with a redefinable instruction set processor
The growing complexity and production cost of processor-based systems have imposed big constraints in SoC design of new systems. GPPs and ASICs are unable to fit the tight perform...
Victor M. Goulart Ferreira, Lovic Gauthier, Takayu...