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» Automatic Verification of Timed Circuits
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SIBGRAPI
2000
IEEE
14 years 3 months ago
An Off-Line Signature Verification System using Hidden Markov Model and Cross-Validation
This work has as main objective to present an off-line signature verification system. It is basically divided into three parts. The first one demonstrates a pre-processing process,...
Edson J. R. Justino, Abdenaim El Yacoubi, Fl&aacut...
WSC
2007
14 years 1 months ago
Automatic generation of simulation models for semiconductor manufacturing
This article gives an overview of a framework for automatically generating large-scale simulation models from a domain specific problem definition data schema, here semiconductor ...
Ralph Mueller, Christos Alexopoulos, Leon F. McGin...
ICIP
2009
IEEE
14 years 12 months ago
Palmprint Verification Using Consistent Orientation Coding
Developing accurate and robust palmprint verification algorithms is one of the key issues in automatic palmprint recognition systems. Recently, orientation based coding algorithms...
ASPDAC
2006
ACM
137views Hardware» more  ASPDAC 2006»
14 years 4 months ago
Parameterized block-based non-gaussian statistical gate timing analysis
As technology scales down, timing verification of digital integrated circuits becomes an increasingly challenging task due to the gate and wire variability. Therefore, statistical...
Soroush Abbaspour, Hanif Fatemi, Massoud Pedram
ASPDAC
2008
ACM
200views Hardware» more  ASPDAC 2008»
14 years 28 days ago
Non-Gaussian statistical timing analysis using second-order polynomial fitting
In the nanometer manufacturing region, process variation causes significant uncertainty for circuit performance verification. Statistical static timing analysis (SSTA) is thus dev...
Lerong Cheng, Jinjun Xiong, Lei He