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» Automatic Verification of Timed Circuits
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FPL
2004
Springer
112views Hardware» more  FPL 2004»
14 years 4 months ago
Automating the Layout of Reconfigurable Subsystems via Template Reduction
When designing SoCs, a unique opportunity exists to generate custom FPGA architectures that are specific to the application domain in which the device will be used. The inclusion o...
Shawn Phillips, Akshay Sharma, Scott Hauck
ICCV
2003
IEEE
15 years 27 days ago
A Sparse Probabilistic Learning Algorithm for Real-Time Tracking
This paper addresses the problem of applying powerful pattern recognition algorithms based on kernels to efficient visual tracking. Recently Avidan [1] has shown that object recog...
Oliver M. C. Williams, Andrew Blake, Roberto Cipol...
ATAL
2006
Springer
14 years 2 months ago
Verifying space and time requirements for resource-bounded agents
The effective reasoning capability of an agent can be defined as its capability to infer, within a given space and time bound, facts that are logical consequences of its knowledge...
Natasha Alechina, Mark Jago, Piergiorgio Bertoli, ...
TABLEAUX
1998
Springer
14 years 3 months ago
Model Checking: Historical Perspective and Example (Extended Abstract)
ple (Extended Abstract) Edmund M. Clarke and Sergey Berezin Carnegie Mellon University -- USA Model checking is an automatic verification technique for finite state concurrent syst...
Edmund M. Clarke, Sergey Berezin
ICIP
2008
IEEE
15 years 21 days ago
Real-time face alignment with tracking in video
Real-time face alignment in video is very critical in many applications such as facial expression analysis, driver fatigue monitoring, etc. This paper presents a real time algorit...
Yanchao Su, Haizhou Ai, Shihong Lao