302 search results - page 9 / 61 » Automatic Verification of Timed Circuits |
TCS
2002
13 years 9 months ago
2002
We consider the timed automata model of [3], which allows the analysis of realtime systems expressed in terms of quantitative timing constraints. Traditional approaches to real-ti...
ENTCS
2008
13 years 10 months ago
2008
This paper gives an overview of results of the project "Beyond Timed Automata" carried out in the Collaborative Research Center AVACS (Automatic Verification and Analysi...
DAC
2005
ACM
14 years 10 months ago
2005
ACM
Recent study shows that the existing first order canonical timing model is not sufficient to represent the dependency of the gate delay on the variation sources when processing an...
VLSID
1999
IEEE
14 years 2 months ago
1999
IEEE
This paper presents a detailed description of the application of a formal verification methodology to an ARM processor. The processor, a hybrid between the ARM7 and the StrongARM ...
FORMATS
2010
Springer
13 years 7 months ago
2010
Springer
Abstract. Quantitative verification techniques are able to establish system properties such as "the probability of an airbag failing to deploy on demand" or "the exp...