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FCCM
2007
IEEE
129views VLSI» more  FCCM 2007»
14 years 3 months ago
Automatic On-chip Memory Minimization for Data Reuse
FPGA-based computing engines have become a promising option for the implementation of computationally intensive applications due to high flexibility and parallelism. However, one...
Qiang Liu, George A. Constantinides, Konstantinos ...
ICPP
1995
IEEE
14 years 8 days ago
The Quest for a Zero Overhead Shared Memory Parallel Machine
– In this paper we present a new approach to benchmark the performance of shared memory systems. This approach focuses on recognizing how far off the performance of a given memor...
Gautam Shah, Aman Singla, Umakishore Ramachandran
OOPSLA
2005
Springer
14 years 2 months ago
Lifting sequential graph algorithms for distributed-memory parallel computation
This paper describes the process used to extend the Boost Graph Library (BGL) for parallel operation with distributed memory. The BGL consists of a rich set of generic graph algor...
Douglas Gregor, Andrew Lumsdaine
PDP
2002
IEEE
14 years 1 months ago
The CDAG: A Data Structure for Automatic Parallelization for a Multithreaded Architecture
Despite the explosive new interest in Distributed Computing, bringing software — particularly legacy software — to parallel platforms remains a daunting task. The Self Distrib...
Bernd Klauer, Frank Eschmann, Ronald Moore, Klaus ...
ICPPW
2002
IEEE
14 years 1 months ago
Data Distribution Schemes of Sparse Arrays on Distributed Memory Multicomputers
A data distribution scheme of sparse arrays on a distributed memory multicomputer, in general, is composed of three phases, data partition, data distribution, and data compression...
Chun-Yuan Lin, Yeh-Ching Chung, Jen-Shiuh Liu