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IEEEPACT
2005
IEEE
14 years 1 months ago
Memory Coloring: A Compiler Approach for Scratchpad Memory Management
Scratchpad memory (SPM), a fast software-managed onchip SRAM, is now widely used in modern embedded processors. Compared to hardware-managed cache, it is more efficient in perfor...
Lian Li 0002, Lin Gao 0002, Jingling Xue
LCTRTS
2007
Springer
14 years 1 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
HPCA
2000
IEEE
14 years 4 days ago
Design of a Parallel Vector Access Unit for SDRAM Memory Systems
We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...
Binu K. Mathew, Sally A. McKee, John B. Carter, Al...
SDM
2009
SIAM
167views Data Mining» more  SDM 2009»
14 years 4 months ago
Parallel Pairwise Clustering.
Given the pairwise affinity relations associated with a set of data items, the goal of a clustering algorithm is to automatically partition the data into a small number of homogen...
Elad Yom-Tov, Noam Slonim
TVCG
2010
165views more  TVCG 2010»
13 years 2 months ago
Binary Mesh Partitioning for Cache-Efficient Visualization
Abstract--One important bottleneck when visualizing large data sets is the data transfer between processor and memory. Cacheaware (CA) and cache-oblivious (CO) algorithms take into...
Marc Tchiboukdjian, Vincent Danjean, Bruno Raffin