65 search results - page 13 / 13 » Automatic parallel code generation for tiled nested loops |
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
The growing complexity of modern processors has made the development of highly efficient code increasingly difficult. Manually developing highly efficient code is usually expen...
WOTUG
2008
13 years 8 months ago
2008
Most motion control systems for mechatronic systems are implemented on digital computers. In this paper we present an FPGA based solution implemented on a low cost Xilinx Spartan I...
CASES
2009
ACM
14 years 1 months ago
2009
ACM
Coarse-grained reconfigurable architectures (CGRAs) present an appealing hardware platform by providing programmability with the potential for high computation throughput, scalab...
HPDC
1996
IEEE
13 years 11 months ago
1996
IEEE
Load balancing involves assigning to each processor, work proportional to its performance, minimizing the execution time of the program. Althoughstatic load balancing can solve ma...
ICS
2009
Tsinghua U.
13 years 11 months ago
2009
Tsinghua U.
Modern GPUs offer much computing power at a very modest cost. Even though CUDA and other related recent developments are accelerating the use of GPUs for general purpose applicati...