In this paper we present a concept for automated testing of object-oriented applications and a tool called SeDiTeC that implements these concepts for Java applications. SeDiTeC us...
Abstract--Functional verification is one of the major bottlenecks in system-on-chip design due to the combined effects of increasing complexity and lack of automated techniques for...
Organizations have become increasingly dependent on computing systems to achieve their business goals. The performance of these systems in terms of response times and cost has a m...
M. Qin, R. Lee, Asham El Rayess, Vidar Vetland, Je...
User preferences for automated assistance often vary widely, depending on the situation, and quality or presentation of help. Developing effective models to learn individual prefe...
Static analysis tools report software defects that may or may not be detected by other verification methods. Two challenges complicating the adoption of these tools are spurious f...
Joseph R. Ruthruff, John Penix, J. David Morgentha...