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» Automating software feature verification
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VMCAI
2010
Springer
14 years 5 months ago
Building a Calculus of Data Structures
Abstract. Techniques such as verification condition generation, preditraction, and expressive type systems reduce software verification to proving formulas in expressive logics. Pr...
Viktor Kuncak, Ruzica Piskac, Philippe Suter, Thom...
POPL
2008
ACM
14 years 8 months ago
Relevance heuristics for program analysis
Relevance heuristics allow us to tailor a program analysis to a particular property to be verified. This in turn makes it possible to improve the precision of the analysis where n...
Kenneth L. McMillan
B
2007
Springer
14 years 14 days ago
Automatic Translation from Combined B and CSP Specification to Java Programs
Abstract. A recent contribution to the formal specification and verification of concurrent systems is the integration of the state- and event-based approaches B and CSP, specifical...
Letu Yang, Michael Poppleton
CADE
2007
Springer
14 years 8 months ago
A Termination Checker for Isabelle Hoare Logic
Abstract. Hoare logic is widely used for software specification and verification. Frequently we need to prove the total correctness of a program: to prove that the program not only...
Jia Meng, Lawrence C. Paulson, Gerwin Klein
CADE
2006
Springer
14 years 8 months ago
Tree Automata with Equality Constraints Modulo Equational Theories
This paper presents new classes of tree automata combining automata with equality test and automata modulo equational theories. We believe that these classes have a good potential ...
Florent Jacquemard, Laurent Vigneron, Michaël...