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ASPDAC
2005
ACM
103views Hardware» more  ASPDAC 2005»
13 years 9 months ago
MAIA: a framework for networks on chip generation and verification
- The increasing complexity of SoCs makes networks on chip (NoC) a promising substitute for busses and dedicated wires interconnection schemes. However, new tools need to be develo...
Luciano Ost, Aline Mello, José Palma, Ferna...
IUI
2003
ACM
14 years 6 days ago
An experiment in automated humorous output production
Computational humor will be needed in interfaces, no less than other cognitive capabilities. There are many practical settings where computational humor will add value. Among them...
Oliviero Stock, Carlo Strapparava
DAC
1999
ACM
13 years 11 months ago
ipChinook: an Integrated IP-based Design Framework for Distributed Embedded Systems
IPCHINOOK is a design tool for distributed embedded systems. It gains leverage from the use of a carefully chosen set of design ions that raise the level of designer interaction d...
Pai H. Chou, Ross B. Ortega, Ken Hines, Kurt Partr...
SBCCI
2005
ACM
114views VLSI» more  SBCCI 2005»
14 years 15 days ago
Traffic generation and performance evaluation for mesh-based NoCs
The designer of a system on a chip (SoC) that connects IP cores through a network on chip (NoC) needs methods to support application performance evaluation. Two key aspects these ...
Leonel Tedesco, Aline Mello, Diego Garibotti, Ney ...
DAC
2002
ACM
14 years 8 months ago
Embedded software-based self-testing for SoC design
At-speed testing of high-speed circuits is becoming increasingly difficult with external testers due to the growing gap between design and tester performance, growing cost of high...
Angela Krstic, Wei-Cheng Lai, Kwang-Ting Cheng, Li...