732 search results - page 61 / 147 » Axiomatising timed automata |
ACSD
2006
IEEE
13 years 11 months ago
2006
IEEE
Reuse of IP blocks has been advocated as a means to conquer the complexity of today's system-on-chip (SoC) designs. Component integration and verification in such systems is ...
NFM
2011
13 years 3 months ago
2011
Abstract. We present a new open source model checker, opaal, for automatic verification of models using lattice automata. Lattice automata allow the users to incorporate abstracti...
CONCUR
2007
Springer
14 years 3 months ago
2007
Springer
Abstract. We propose a new model for timed games, based on concurrent game structures (CGSs). Compared to the classical timed game automata of Asarin et al. [8], our timed CGSs are...
FATES
2004
Springer
14 years 2 months ago
2004
Springer
A Time Action Lock is a state of a Real-time system at which neither time can progress nor an action can occur. Time Action Locks are often seen as signs of errors in the model or ...
ASYNC
2005
IEEE
14 years 2 months ago
2005
IEEE
We propose a novel technique for modeling and verifying timed circuits based on the notion of generalized relative timing. Generalized relative timing constraints can express not ...