We propose in this paper a multilevel full-chip routing algorithm that improves testability and diagnosability, manufacturability, and signal integrity for yield enhancement. Two ...
Meeting power and performance requirement is a challenging task in high speed ALUs. Supply voltage scaling is promising because it reduces both switching and active power but it al...
This paper shows an application in the field of Electronic CAD of the Selfish Gene algorithm, an evolutionary algorithm based on a recent interpretation of the Darwinian theory. Te...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
In this paper, we present a new synthesis feature namely, "Xor matching", and the foldback product term synthesis for Complex Programmable Logic Devices (CPLD) architectu...
— There is a growing interest in developing low cost, low power, highly integrated biosensor systems to characterize individual cells for applications such as cell analysis, drug...
Honghao Ji, Pamela Abshire, M. Urdaneta, Elisabeth...