Sciweavers

1221 search results - page 215 / 245
» Balanced graph partitioning
Sort
View
ISCA
2009
IEEE
189views Hardware» more  ISCA 2009»
14 years 2 months ago
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ra...
IEEEPACT
2008
IEEE
14 years 2 months ago
Distributed cooperative caching
This paper presents the Distributed Cooperative Caching, a scalable and energy-efficient scheme to manage chip multiprocessor (CMP) cache resources. The proposed configuration is...
Enric Herrero, José González, Ramon ...
IEEEPACT
2007
IEEE
14 years 1 months ago
Speculative Decoupled Software Pipelining
In recent years, microprocessor manufacturers have shifted their focus from single-core to multi-core processors. To avoid burdening programmers with the responsibility of paralle...
Neil Vachharajani, Ram Rangan, Easwaran Raman, Mat...
IPPS
2007
IEEE
14 years 1 months ago
An Implementation and Evaluation of Client-Side File Caching for MPI-IO
Client-side file caching has long been recognized as a file system enhancement to reduce the amount of data transfer between application processes and I/O servers. However, cach...
Wei-keng Liao, Avery Ching, Kenin Coloma, Alok N. ...
IPPS
2006
IEEE
14 years 1 months ago
An extensible global address space framework with decoupled task and data abstractions
ions Sriram Krishnamoorthy½ Umit Catalyurek¾ Jarek Nieplocha¿ Atanas Rountev½ P. Sadayappan½ ½ Dept. of Computer Science and Engineering, ¾ Dept. of Biomedical Informatics T...
Sriram Krishnamoorthy, Ümit V. Çataly&...