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ICS
1998
Tsinghua U.
13 years 11 months ago
Load Execution Latency Reduction
In order to achieve high performance, contemporary microprocessors must effectively process the four major instruction types: ALU, branch, load, and store instructions. This paper...
Bryan Black, Brian Mueller, Stephanie Postal, Ryan...
SIAMSC
2010
120views more  SIAMSC 2010»
13 years 5 months ago
Weighted Matrix Ordering and Parallel Banded Preconditioners for Iterative Linear System Solvers
The emergence of multicore architectures and highly scalable platforms motivates the development of novel algorithms and techniques that emphasize concurrency and are tolerant of ...
Murat Manguoglu, Mehmet Koyutürk, Ahmed H. Sa...
SIGMOD
1996
ACM
151views Database» more  SIGMOD 1996»
13 years 11 months ago
BIRCH: An Efficient Data Clustering Method for Very Large Databases
Finding useful patterns in large datasets has attracted considerable interest recently, and one of the most widely st,udied problems in this area is the identification of clusters...
Tian Zhang, Raghu Ramakrishnan, Miron Livny
TPDS
2002
198views more  TPDS 2002»
13 years 7 months ago
Orthogonal Striping and Mirroring in Distributed RAID for I/O-Centric Cluster Computing
This paper presents a new distributed disk-array architecture for achieving high I/O performance in scalable cluster computing. In a serverless cluster of computers, all distribute...
Kai Hwang, Hai Jin, Roy S. C. Ho
PPOPP
2011
ACM
12 years 10 months ago
GRace: a low-overhead mechanism for detecting data races in GPU programs
In recent years, GPUs have emerged as an extremely cost-effective means for achieving high performance. Many application developers, including those with no prior parallel program...
Mai Zheng, Vignesh T. Ravi, Feng Qin, Gagan Agrawa...