Sciweavers

117 search results - page 8 / 24
» Balancing power consumption in multiprocessor systems
Sort
View
INFOCOM
2009
IEEE
14 years 2 months ago
Power-Aware Speed Scaling in Processor Sharing Systems
—Energy use of computer communication systems has quickly become a vital design consideration. One effective method for reducing energy consumption is dynamic speed scaling, whic...
Adam Wierman, Lachlan L. H. Andrew, Ao Tang
FAST
2007
13 years 9 months ago
PARAID: A Gear-Shifting Power-Aware RAID
Reducing power consumption for server computers is important, since increased energy usage causes increased heat dissipation, greater cooling requirements, reduced computational d...
Charles Weddle, Mathew Oldham, Jin Qian, An-I Andy...
SAMOS
2010
Springer
13 years 5 months ago
Power aware heterogeneous MPSoC with dynamic task scheduling and increased data locality for multiple applications
A new heterogeneous multiprocessor system with dynamic memory and power management for improved performance and power consumption is presented. Increased data locality is automatic...
Oliver Arnold, Gerhard Fettweis
HPCA
2012
IEEE
12 years 3 months ago
Balancing DRAM locality and parallelism in shared memory CMP systems
Modern memory systems rely on spatial locality to provide high bandwidth while minimizing memory device power and cost. The trend of increasing the number of cores that share memo...
Min Kyu Jeong, Doe Hyun Yoon, Dam Sunwoo, Mike Sul...
DAC
2009
ACM
14 years 8 months ago
Process variation characterization of chip-level multiprocessors
Within-die variation in leakage power consumption is substantial and increasing for chip-level multiprocessors (CMPs) and multiprocessor systems-on-chip. Dealing with this problem...
Lide Zhang, Lan S. Bai, Robert P. Dick, Li Shang, ...