271 search results - page 22 / 55 » Bandwidth-Friendly Cache Hierarchy |
ICDCS
2008
IEEE
14 years 4 months ago
2008
IEEE
In today’s networked storage environment, it is common to have a hierarchy of caches where the lower levels of the hierarchy are accessed by multiple clients. This sharing can h...
CSREAESA
2003
13 years 11 months ago
2003
Energy dissipation in cache memories is becoming a major design issue in embedded microprocessors. Predictive filter cache based instruction cache hierarchy is effective in reduci...
CGO
2003
IEEE
14 years 1 months ago
2003
IEEE
In this paper, we present METRIC, an environment for determining memory inefficiencies by examining data traces. METRIC is designed to alter the performance behavior of applicatio...
IPPS
2006
IEEE
14 years 3 months ago
2006
IEEE
Chip multiprocessors (CMPs) are becoming a popular way of exploiting ever-increasing number of on-chip transistors. At the same time, the location of data on the chip can play a c...
CF
2005
ACM
13 years 12 months ago
2005
ACM
Modern microprocessor designs continue to obtain impressive performance gains through increasing clock rates and advances in the parallelism obtained via micro-architecture design...