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FMCAD
2009
Springer
14 years 3 months ago
Scaling VLSI design debugging with interpolation
—Given an erroneous design, functional verification returns an error trace exhibiting a mismatch between the specification and the implementation of a design. Automated design ...
Brian Keng, Andreas G. Veneris
ETS
2006
IEEE
114views Hardware» more  ETS 2006»
13 years 9 months ago
From Research Resources to Learning Objects: Process Model and Virtualization Experiences
Typically, most research and academic institutions own and archive a great amount of objects and research related resources that have been produced, used and maintained over long ...
José Luis Sierra, Alfredo Fernández-...
ICML
2004
IEEE
14 years 9 months ago
Lookahead-based algorithms for anytime induction of decision trees
The majority of the existing algorithms for learning decision trees are greedy--a tree is induced top-down, making locally optimal decisions at each node. In most cases, however, ...
Saher Esmeir, Shaul Markovitch
IJPP
2011
115views more  IJPP 2011»
13 years 9 days ago
Milepost GCC: Machine Learning Enabled Self-tuning Compiler
Tuning compiler optimizations for rapidly evolving hardware makes porting and extending an optimizing compiler for each new platform extremely challenging. Iterative optimization i...
Grigori Fursin, Yuriy Kashnikov, Abdul Wahid Memon...
AAAI
2006
13 years 10 months ago
Decision Making in Uncertain Real-World Domains Using DT-Golog
DTGolog, a decision-theoretic agent programming language based on the situation calculus, was proposed to ease some of the computational difficulties associated with Markov Decisi...
Mikhail Soutchanski, Huy Pham, John Mylopoulos