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» Benchmarking and hardware implementation of JPEG-LS
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IEEEPACT
2006
IEEE
14 years 1 months ago
Region array SSA
Static Single Assignment (SSA) has become the intermediate program representation of choice in most modern compilers because it enables efficient data flow analysis of scalars an...
Silvius Rus, Guobin He, Christophe Alias, Lawrence...
IJCNN
2006
IEEE
14 years 1 months ago
Online Training of a Generalized Neuron with Particle Swarm Optimization
— Neural networks are used in a wide number of fields including signal and image processing, modeling and control and pattern recognition. Some of the most common type of neural ...
Raveesh Kiran, Sandhya R. Jetti, Ganesh K. Venayag...
ISLPED
2006
ACM
105views Hardware» more  ISLPED 2006»
14 years 1 months ago
Reducing power through compiler-directed barrier synchronization elimination
Interprocessor synchronization, while extremely important for ensuring execution correctness, can be very costly in terms of both power and performance overheads. Unfortunately, m...
Mahmut T. Kandemir, Seung Woo Son
IEEEPACT
2005
IEEE
14 years 1 months ago
Memory Coloring: A Compiler Approach for Scratchpad Memory Management
Scratchpad memory (SPM), a fast software-managed onchip SRAM, is now widely used in modern embedded processors. Compared to hardware-managed cache, it is more efficient in perfor...
Lian Li 0002, Lin Gao 0002, Jingling Xue
SBCCI
2005
ACM
115views VLSI» more  SBCCI 2005»
14 years 1 months ago
Design of a decompressor engine on a SPARC processor
Code compression, initially conceived as an effective technique to reduce code size in embedded systems, today also brings advantages in terms of performance and energy consumpti...
Richard E. Billo, Rodolfo Azevedo, Guido Araujo, P...