1159 search results - page 164 / 232 » Binary Decision Graphs |
VLSID
1999
IEEE
14 years 2 months ago
1999
IEEE
In this paper we address the problem of detailed FPGA routing using Boolean formulation methods. In the context of FPGA routing where routing resources are fixed, Boolean formulat...
AGP
1998
IEEE
14 years 2 months ago
1998
IEEE
The subject of groundness analysis for (constraint) logic programs has been widely studied, and interesting domains have been proposed. Pos has been recognized as the most suitabl...
ISSTA
1998
ACM
14 years 2 months ago
1998
ACM
Symbolic model checking has proved highly successful for large nite-state systems, in which states can be compactly encoded using binary decision diagrams (BDDs) or their variants...
DAC
1997
ACM
14 years 2 months ago
1997
ACM
Binary Decision Diagrams BDDs are e cient at manipulating large sets in a compact manner. BDDs, however, are inefcient at utilizing the memory hierarchy of the computer. Recent ...
VLSID
1996
IEEE
14 years 2 months ago
1996
IEEE
Reduced Ordered Binary Decision Diagrams ROBDDs have traditionally been built in a bottom-up fashion. In this scheme, the intermediate peak memory utilization is often larger than...