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CTRSA
2010
Springer
152views Cryptology» more  CTRSA 2010»
13 years 12 months ago
Differential Cache-Collision Timing Attacks on AES with Applications to Embedded CPUs
This paper proposes a new type of cache-collision timing attacks on software implementations of AES. Our major technique is of differential nature and is based on the internal cryp...
Andrey Bogdanov, Thomas Eisenbarth, Christof Paar,...
ECRTS
2008
IEEE
14 years 3 months ago
WCET-driven Cache-based Procedure Positioning Optimizations
Procedure Positioning is a well known compiler optimization aiming at the improvement of the instruction cache behavior. A contiguous mapping of procedures calling each other freq...
Paul Lokuciejewski, Heiko Falk, Peter Marwedel
FPGA
2000
ACM
150views FPGA» more  FPGA 2000»
14 years 8 days ago
Programmable memory blocks supporting content-addressable memory
The Embedded System Block (ESB) of the APEX E programmable logic device family from Altera Corporation includes the capability of implementing content addressable memory (CAM) as ...
Frank Heile, Andrew Leaver, Kerry Veenstra
HIPEAC
2007
Springer
14 years 2 months ago
Reducing Exit Stub Memory Consumption in Code Caches
Abstract. The interest in translation-based virtual execution environments (VEEs) is growing with the recognition of their importance in a variety of applications. However, due to ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa
VLSID
2008
IEEE
138views VLSI» more  VLSID 2008»
14 years 9 months ago
Memory Architecture Exploration Framework for Cache Based Embedded SOC
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...