613 search results - page 28 / 123 » Block cache for embedded systems |
CCGRID
2003
IEEE
14 years 1 months ago
2003
IEEE
I/O bottlenecks are already a problem in many largescale applications that manipulate huge datasets. This problem is expected to get worse as applications get larger, and the I/O ...
ICS
1999
Tsinghua U.
14 years 28 days ago
1999
Tsinghua U.
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
LCTRTS
2010
Springer
13 years 10 months ago
2010
Springer
In preemptive real-time systems, scheduling analyses need—in addition to the worst-case execution time—the context-switch cost. In case of preemption, the preempted and the pr...
EVOW
2011
Springer
13 years 4 days ago
2011
Springer
Abstract. Electronic embedded systems designers aim at finding a tradeoff between cost and power consumption. As cache memory management has been shown to have a significant imp...
ISCA
2002
IEEE
14 years 1 months ago
2002
IEEE
This paper investigates a class of main memory accesses (invalid memory traffic) that can be eliminated altogether. Invalid memory traffic is real data traffic that transfers inva...