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FPL
2005
Springer
114views Hardware» more  FPL 2005»
14 years 1 months ago
Measuring and Utilizing the Correlation Between Signal Connectivity and Signal Positioning for FPGAs Containing Multi-Bit Buildi
As the logic capacity of FPGA increases, there has been a corresponding increase in the variety of FPGA building blocks. From a mere collection of the conventional logic blocks, F...
Andy Gean Ye, Jonathan Rose
ICIP
2002
IEEE
14 years 20 days ago
Wavelet-domain reconstruction of lost blocks in wireless image transmission and packet-switched networks
— A fast scheme for wavelet-domain interpolation of lost image blocks in wireless image transmission is presented in this paper. The algorithm is designed to be compatible with t...
Shantanu Rane, Jeremiah Remus, Guillermo Sapiro
ICPP
2002
IEEE
14 years 20 days ago
Analysis of Memory Hierarchy Performance of Block Data Layout
Recently, several experimental studies have been conducted on block data layout as a data transformation technique used in conjunction with tiling to improve cache performance. In...
Neungsoo Park, Bo Hong, Viktor K. Prasanna
ICCD
1999
IEEE
132views Hardware» more  ICCD 1999»
14 years 1 days ago
Generic Universal Switch Blocks
Michael Shyu, Yu-Dong Chang, Guang-Ming Wu, Yao-We...
FSE
2000
Springer
142views Cryptology» more  FSE 2000»
13 years 11 months ago
Linear Cryptanalysis of Reduced-Round Versions of the SAFER Block Cipher Family
Abstract. This paper presents a linear cryptanalytic attack against reduced round variants of the SAFER family of block ciphers. Compared
Jorge Nakahara Jr., Bart Preneel, Joos Vandewalle