Abstract--Functional verification is one of the major bottlenecks in system-on-chip design due to the combined effects of increasing complexity and lack of automated techniques for...
Interpolation is an important technique in verification and static analysis of programs. In particular, interpolants extracted from proofs of various properties are used in invar...
Abstract. We investigate the complexity of merging sequences of small integers on the EREW PRAM. Our most surprising result is that two sorted sequences of n bits each can be merge...
—We study the problem of throughput maximization in multi-hop wireless networks with end-to-end delay constraints for each session. This problem has received much attention start...
Guanhong Pei, V. S. Anil Kumar, Srinivasan Parthas...
— We consider the problem of small-gain analysis of asymptotic behavior in interconnected nonlinear dynamic systems. Mathematical models of these systems are allowed to be uncert...
Ivan Tyukin, Erik Steur, Henk Nijmeijer, Cees van ...