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IWANN
2007
Springer
14 years 1 months ago
Advantages of Using Feature Selection Techniques on Steganalysis Schemes
Abstract. Steganalysis consists in classifying documents as steganographied or genuine. This paper presents a methodology for steganalysis based on a set of 193 features with two m...
Yoan Miche, Patrick Bas, Amaury Lendasse, Christia...
FORMATS
2007
Springer
13 years 11 months ago
Partial Order Reduction for Verification of Real-Time Components
Abstract. We describe a partial order reduction technique for a realtime component model. Components are described as timed automata with data ports, which can be composed in stati...
John Håkansson, Paul Pettersson
ESANN
2004
13 years 9 months ago
Regularizing generalization error estimators: a novel approach to robust model selection
Abstract. A well-known result by Stein shows that regularized estimators with small bias often yield better estimates than unbiased estimators. In this paper, we adapt this spirit ...
Masashi Sugiyama, Motoaki Kawanabe, Klaus-Robert M...
IEEECIT
2010
IEEE
13 years 6 months ago
Superblock-Based Source Code Optimizations for WCET Reduction
—Superblocks represent regions in a program code that consist of multiple basic blocks. Compilers benefit from this structure since it enables optimization across block boundari...
Paul Lokuciejewski, Timon Kelter, Peter Marwedel
ICCAD
2006
IEEE
111views Hardware» more  ICCAD 2006»
14 years 4 months ago
Mapping arbitrary logic functions into synchronous embedded memories for area reduction on FPGAs
This work describes a new mapping technique, RAM-MAP, that identifies parts of circuits that can be efficiently mapped into the synchronous embedded memories found on field prog...
Gordon R. Chiu, Deshanand P. Singh, Valavan Manoha...