We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...
Binu K. Mathew, Sally A. McKee, John B. Carter, Al...
—This paper presents an approach for the reliability-aware design optimization of real-time systems on multi-processor platforms. The optimization is based on an extension of wel...
Jia Huang, Jan Olaf Blech, Andreas Raabe, Christia...
Abstract—We study the throughput capacity of wireless networks which employ (asynchronous) random-access scheduling as opposed to deterministic scheduling. The central question w...
Deepti Chafekar, Dave Levin, V. S. Anil Kumar, Mad...
This paper presents a modification of GLADE —the current GNAT implementation of the Ada 95 Distributed Systems Annex (DSA)— to support the development of distributed applicatio...
The complexity and physical distribution of modern active-safety automotive applications requires the use of distributed architectures. These architectures consist of multiple ele...
Abhijit Davare, Qi Zhu, Marco Di Natale, Claudio P...