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HPCA
2000
IEEE
13 years 12 months ago
Design of a Parallel Vector Access Unit for SDRAM Memory Systems
We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...
Binu K. Mathew, Sally A. McKee, John B. Carter, Al...
DSD
2011
IEEE
194views Hardware» more  DSD 2011»
12 years 7 months ago
Reliability-Aware Design Optimization for Multiprocessor Embedded Systems
—This paper presents an approach for the reliability-aware design optimization of real-time systems on multi-processor platforms. The optimization is based on an extension of wel...
Jia Huang, Jan Olaf Blech, Andreas Raabe, Christia...
INFOCOM
2008
IEEE
14 years 2 months ago
Capacity of Asynchronous Random-Access Scheduling in Wireless Networks
Abstract—We study the throughput capacity of wireless networks which employ (asynchronous) random-access scheduling as opposed to deterministic scheduling. The central question w...
Deepti Chafekar, Dave Levin, V. S. Anil Kumar, Mad...
ADAEUROPE
2004
Springer
14 years 29 days ago
The Chance for Ada to Support Distribution and Real-Time in Embedded Systems
This paper presents a modification of GLADE —the current GNAT implementation of the Ada 95 Distributed Systems Annex (DSA)— to support the development of distributed applicatio...
Juan López Campos, J. Javier Gutiérr...
DAC
2007
ACM
14 years 8 months ago
Period Optimization for Hard Real-time Distributed Automotive Systems
The complexity and physical distribution of modern active-safety automotive applications requires the use of distributed architectures. These architectures consist of multiple ele...
Abhijit Davare, Qi Zhu, Marco Di Natale, Claudio P...