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GLVLSI
2007
IEEE
194views VLSI» more  GLVLSI 2007»
13 years 11 months ago
Probabilistic maximum error modeling for unreliable logic circuits
Reliability modeling and evaluation is expected to be one of the major issues in emerging nano-devices and beyond 22nm CMOS. Such devices would have inherent propensity for gate f...
Karthikeyan Lingasubramanian, Sanjukta Bhanja
CCS
2006
ACM
13 years 11 months ago
Secure hierarchical in-network aggregation in sensor networks
In-network aggregation is an essential primitive for performing queries on sensor network data. However, most aggregation algorithms assume that all intermediate nodes are trusted...
Haowen Chan, Adrian Perrig, Dawn Xiaodong Song
FPGA
2004
ACM
140views FPGA» more  FPGA 2004»
13 years 11 months ago
Using reconfigurability to achieve real-time profiling for hardware/software codesign
Embedded systems combine a processor with dedicated logic to meet design specifications at a reasonable cost. The attempt to amalgamate two distinct design environments introduces...
Lesley Shannon, Paul Chow
AGP
1995
IEEE
13 years 11 months ago
A Prolog Implementation of Kem
In this paper, we describe a Prolog implementation of a new theorem prover for (normal propositional) modal and multi–modal logics. The theorem prover, which is called KEM, arise...
Alberto Artosi, Paola Cattabriga, Guido Governator...
RTCSA
1995
IEEE
13 years 11 months ago
A timeliness-guaranteed kernel model-DREAM kernel-and implementation techniques
: An essential building-block for construction of future real-time computer systems (RTCS’s) is a timeliness-guaranteed operating system. The first co-author recently formulated ...
K. H. (Kane) Kim, Luiz F. Bacellar, Yuseok Kim, Ch...