Sciweavers

393 search results - page 30 / 79
» C Compiler Design for an Industrial Network Processor
Sort
View
CODES
2008
IEEE
14 years 2 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
CISIS
2010
IEEE
14 years 3 months ago
Threaded Dynamic Memory Management in Many-Core Processors
—Current trends in desktop processor design have been toward many-core solutions with increased parallelism. As the number of supported threads grows in these processors, it may ...
Edward C. Herrmann, Philip A. Wilsey
SAC
2010
ACM
14 years 2 months ago
General constant expressions for system programming languages
Most mainstream system programming languages provide support for builtin types, and extension mechanisms through userdefined types. They also come with a notion of constant expre...
Gabriel Dos Reis, Bjarne Stroustrup
FPL
2008
Springer
116views Hardware» more  FPL 2008»
13 years 10 months ago
NOC architecture design for multi-cluster chips
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
Henrique C. Freitas, Philippe Olivier Alexandre Na...
IJES
2008
128views more  IJES 2008»
13 years 8 months ago
On-chip implementation of multiprocessor networks and switch fabrics
: On-chipimplementationofmultiprocessorsystemsneedstoplanarisetheinterconnect networks onto the silicon floorplan. Compared with traditional ASIC/SoC architectures, Multiprocessor ...
Terry Tao Ye, Giovanni De Micheli