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TCAD
2002
146views more  TCAD 2002»
13 years 10 months ago
Static scheduling of multidomain circuits for fast functional verification
With the advent of system-on-a-chip design, many application specific integrated circuits (ASICs) now require multiple design clocks that operate asynchronously to each other. This...
Murali Kudlugi, Russell Tessier
FPGA
2006
ACM
129views FPGA» more  FPGA 2006»
14 years 2 months ago
Power-aware RAM mapping for FPGA embedded memory blocks
Embedded memory blocks are important resources in contemporary FPGA devices. When targeting FPGAs, application designers often specify high-level memory functions which exhibit a ...
Russell Tessier, Vaughn Betz, David Neto, Thiagara...
JSA
2002
130views more  JSA 2002»
13 years 10 months ago
Reconfigurable models of finite state machines and their implementation in FPGAs
This paper examines some models of FSMs that can be implemented in dynamically and statically reconfigurable FPGAs. They enable circuits for the FSMs to be constructed in such a wa...
Valery Sklyarov
ASYNC
2010
IEEE
230views Hardware» more  ASYNC 2010»
13 years 2 months ago
The Devolution of Synchronizers
— Synchronizers play a key role in multi-clock domain systems on chip. Traditionally, improvement of synchronization parameters with scaling has been assumed. In particular, the ...
Salomon Beer, Ran Ginosar, Michael Priel, Rostisla...
DT
2002
67views more  DT 2002»
13 years 10 months ago
A Retargetable Embedded In-Circuit Emulation Module for Microprocessors
This article presents an in-circuit emulation (ICE) module that can be embedded with a microprocessr core. The ICE module, based on the IEEE 1149.1 JTAG architecture, supports typ...
Ing-Jer Huang, Chung-Fu Kao, Hsin-Ming Chen, Ching...