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JSA
2000
116views more  JSA 2000»
13 years 7 months ago
Distributed vector architectures
Integrating processors and main memory is a promising approach to increase system performance. Such integration provides very high memory bandwidth that can be exploited efficientl...
Stefanos Kaxiras
GLVLSI
2002
IEEE
108views VLSI» more  GLVLSI 2002»
14 years 16 days ago
Protected IP-core test generation
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
Alessandro Fin, Franco Fummi
CCGRID
2002
IEEE
14 years 17 days ago
Using TOP-C and AMPIC to Port Large Parallel Applications to the Computational Grid
Porting large applications to distributed computing platforms is a challenging task from a software engineering perspective. The Computational Grid has gained tremendous popularit...
Gene Cooperman, Henri Casanova, Jim Hayes, Thomas ...
COMPSAC
2001
IEEE
13 years 11 months ago
Scenario-Based Functional Regression Testing
Regression testing has been a popular quality assurance technique. Most regression testing techniques are based on code or software design. This paper proposes a scenario-based fu...
Raymond A. Paul, Lian Yu, Wei-Tek Tsai, Xiaoying B...
ECRTS
2007
IEEE
14 years 1 months ago
A Delay Composition Theorem for Real-Time Pipelines
Uniprocessor schedulability theory made great strides, in part, due to the simplicity of composing the delay of a job from the execution times of higher-priority jobs that preempt...
Praveen Jayachandran, Tarek F. Abdelzaher